Abstract
Ring amplifiers enable efficient amplification with less power consumption. These are characterized by fairly power requirements, and innate rail-to-rail output swing and are robust against PVT variations. In this paper, we are presenting an improved self-biased anti-series diode-based ring amplifier (ASD-RAMP) design, implemented on 45-nm CMOS technology. The design uses two diode-connected PMOS transistors that are connected in an anti-series manner to generate a large resistance because of which a high dead-zone voltage is generated. The ASD-RAMP has a settling time of only 4.05 ns, which is nearly half of the conventional self-biased ring amplifier (CSB-RAMP). In comparison to CSB-RAMP, the proposed ASD-RAMP improves the dead-zone voltage by 1.1× while requiring 6.76% less power. The circuit is durable and suitable for high-performance applications since it exhibits great resilience to PVT variations in addition to the improved dead zone voltage and reduced settling time.
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