Abstract
A new high speed, low power and small area CMOS current comparator based on a resistive feedback network is proposed. Simulation results employing 0.35 /spl mu/m CMOS parameters demonstrate 7 ns response time and 0.45 mW power consumption for 0.1 /spl mu/A input current, which represents a /spl sim/400% improvement in power-delay product over existing current comparators. In this design, the bias current and the input impedance are well controlled parameters, and the inherent autozeroing scheme does not require any offset compensation.
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