Low-Power and High-Speed Design of FinFET-Based MCML Delay Element

Abstract

AbstractThis paper carries a performance evaluation of delay elements based on propagation delay (tp), power (PWR), Power-delay product (PDP), and Energy-delay product (EDP). The research article analyses a MOSFET-based CMOS delay element (M-CMOS DE) and a MOSFET-based MCML delay element (M-MCML DE). Simulation results establish the superior performance of M-MCML DE in terms of tp, PWR, PDP and EDP. M-MCML DE exhibit improvement in tp (58.98×), PWR (1.66 K×), PDP (98.07 K×), and EDP (5781.99 K×). Simulation outcomes validate that the MCML based design is a competent candidate to replace the traditional CMOS-based design. As an extension of work, M-MCML DE is implemented using an emerging device––FinFET. The proposed FinFET-based MCML delay element (FinFET MCML DE) emerges as ultra-fast and low power design of delay element. It offers improvement in tp (1.1×), PWR (34.28×), PDP (37.71×), and EDP (41.29×). In this research article, we restrict our attention to design metrics such as tp, PWR, PDP, and EDP. This monograph will rouse more research activities in the area of low power and robust design of digital circuits.KeywordsCMOSMOS current mode logic (MCML)Delay elementPropagation delay (tp)Power (PWR)Power-delay product (PDP)Energy-delay product (EDP)FinFETDelay element