Abstract
This paper reports a novel approach that uses transistor aging in an integrated circuit (IC) to detect hardware Trojans. When a transistor is aged, it results in delays along several paths of the IC. This increase in delay results in timing violations that reveal as timing errors at the output of the IC during its operation. We present experiments using aging-aware standard cell libraries to illustrate the usefulness of the technique in detecting hardware Trojans. Combining IC aging with over-clocking produces a pattern of bit errors at the IC output by the induced timing violations. We use machine learning to learn the bit error distribution at the output of a clean IC. We differentiate the divergence in the pattern of bit errors because of a Trojan in the IC from this baseline distribution. We simulate the golden IC and show robustness to IC-to-IC manufacturing variations. The approach is effective and can detect a Trojan even if we place it far off the critical paths. Results on benchmarks from the Trust-hub show a detection accuracy of $\geq$99%.
Highlights
Manufacturing of integrated circuit (IC) is expensive and requires special fabrication equipment that becomes outdated in a short time
We develop a machine learning approach to compare the observed bit error patterns at the circuit output with the expected bit error patterns trained from a known-good device/simulation
The eight least significant bits are leaked through power side channel before which they are XORed with the bits generated from Linear-Feedback Shift Register (LFSR)
Summary
Manufacturing of ICs is expensive and requires special fabrication equipment that becomes outdated in a short time. Destructive testing implies reverse-engineering and de-layering to detect the presence of malicious circuitry [16] This approach is costly, time consuming and renders the IC useless, it guarantees Trojan detection in the single IC. Non-destructive methods use functional testing (similar to pre-silicon Trojan detection) and side-channel analysis. In [7], Picosecond Imaging Circuit Analysis (PICA) is used to measure optical emissions of the ICs and compare them with a trusted emission image of a ‘‘golden’’ IC In both the methods (i.e., power and radiation), access to ‘‘golden IC’’ is required and as the feature size of IC shrinks, the deviation from ‘‘golden’’ IC due to process variations become pronounced, compensating for the deviations introduced by the Trojans.
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