Abstract

In this work, a correlation between effective work function (EWF) and negative bias temperature instability (NBTI) is considered as a key for understanding the cause of NBTI acceleration in ultra-thin oxides and for its mitigation. High-k first process combined with slant etching of SiO 2 interfacial layer (IL) provides EWF and NBTI trend over the varied SiO 2 thickness. Evaluation of NBTI on the metal/high-k capacitors is done by employing the CV-BTI assessment technique. Whereas a modulation of EWF originating from the metal/high-k interface doesn't affect the NBTI, EWF roll-off originating from SiO 2 /Si interface causes a significant increase in NBTI at UT-EOT. This is explained by the change in alignment of defect level in gate dielectrics and hole injection level in Si substrate induced by the positive fixed charge generation. In contrast, introducing negative fixed charge near SiO 2 /Si interface, causing misalignment of the defect level and hole injection level, results in reduction of NBTI at thick EOT. Finally, lowering the channel doping density is proposed as a way to reduce both NBTI and PBTI.

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