Abstract
Self-aligned and gate-first TiLaO/La2O3n-MOSFET shows an equivalent oxide thickness (EOT) of 0.57nm.Small EOT can be reached using La silicate to suppress the formation of low-? defective interface.This low-EOT MOSFET exhibits the potential to integrate with current CMOS process. We report a self-aligned and gate-first TiLaO/La2O3n-MOSFET with an equivalent oxide thickness (EOT) of 0.57nm and low threshold voltage (Vt) of 0.3V. The small EOT MOSFET can be reached using La-based interfacial layer with strong bond enthalpy (La-O, 799kJ/mol) to suppress the formation of defect-rich low- interfacial layer and simultaneously block titanium atom inter-diffusion to avoid additional EOT increase. This gate-first low-EOT MOSFET exhibits the potential to integrate with current CMOS process.
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