Abstract
This paper reports an analysis of floating body effect related gate tunneling leakage current behavior of the 40 nm PD SOI NMOS device using bipolar/MOS equivalent circuit approach. As confirmed by the experimentally measured data, the bipolar/MOS equivalent circuit approach could predict the gate tunneling leakage current behavior, which is strongly affected by the parasitic bipolar device in the floating body as observed from the perpendicular electric field along the path of the U-shaped edges of the polysilicon gate.
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