Gate Overlapped Lightly Doped Drain Poly-Si TFTs Employing 45° Tilt Implant and OI-ELA Activation for S/D

Abstract

A gate overlapped lightly doped drain (GOLDD) poly-Si thin film transistor (TFT) employing the 45° tilt implant for source and drain (S/D) regions, is proposed. In order to activate both n + S/D and n - lightly doped drain (LDD) regions, and to eliminate junction defects, oblique-incident excimer laser annealing activation (OI-ELA) was performed. At certain conditions, such as when V DS = 3.3 V, V GS = -20 V, the proposed poly-Si TFT with W/L = 10 μm/3 μm exhibited a lower anomalous leakage current of 4.7 X 10 -11 A/μm, than conventional TFTs, with an anomalous leakage current of 1.7 × 10 -9 A/μm. In addition, the proposed device held 89% of maximum transconductance against hot-carrier stress, compared to the conventional one, which holds 46%.