Gate electrode work function engineered JAM-GS-GAA FinFET for analog/RF applications: Performance estimation and optimization

Abstract

In this study, the gate electrode work function engineered Junctionless Accumulation Mode Gate Stack Gate All Around (JAM-GS-GAA) FinFET has been rigorously investigated for analog/RF applications. The simulated findings show that decreasing the gate electrode work function by 0.4 eV improves the static characteristics such as electric field (46.68%), electron mobility (55.0%), potential (5.74%), and electron concentration (2.97%). A 0.4 eV escalation in the gate electrode work function improves the analog parameters of the JAM-GS-GAA FinFET significantly in terms of leakage current (Ioff) (104 times), subthreshold swing (SS) (20.26%), switching ratio (Ion/Ioff) (102 to 106), and quality factor (QF) (25.54%), intrinsic gain (Av) (280.73%), early voltage (VEA) (62.12%), and output conductance (gd) (90.52%). The RF parameters follow the same trend as analog parameters. GFP and GTFP increased more than eight and ten times, respectively, with a surge in the gate electrode work function. Consequently, the findings of this research can assist engineers in designing nanoelectronic devices that meet their requirements.