Strain influence on analog performance of single-gate and FinFET SOI nMOSFETs

Abstract

This work studies the analog performance of uniaxially and biaxially strained single-gate fully depleted SOI nMOSFETs and standard and strained Si (sSOI) n-type triple-gate FinFETs with high-¿ dielectrics and TiN gate material. The analysis is performed focusing on some important analog figures of merit such as transconductance, Early voltage, output conductance and intrinsic voltage gain. It is shown that for single-gate devices the use of any kind of strain promotes the improvement of most analog parameters, resulting in a better or at least not worsen gain than for its unstrained counterpart. However for FinFETs devices, it is demonstrated that both standard and strained FinFETs with short channel length and narrow fins have similar analog properties, whereas an increase of the channel length degrades the Early voltage of the strained devices, consequently decreasing the device intrinsic voltage gain with respect to standard ones. Narrow strained FinFETs with long channel show a degradation of the Early voltage if compared to standard ones suggesting that strained devices are more subjected to the channel length modulation effect. Only for wider and long FinFETs the effect of strain is favorable to both g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> and g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</sub> , resulting in a larger intrinsic voltage gain than in standard FinFETs.