Influence of Fin Width on the Intrinsic Voltage Gain of Standard and Strained Triple-Gate nFinFETs

Abstract

This work studies the influence of the fin width on the intrinsic voltage gain of standard and strained Si (sSOI) n-type triple-gate FinFETs with high-k dielectrics and metal gate. It is demonstrated that independent of the fin width the application of strain improves the device transconductance. On the other hand, the device output conductance shows a high dependence on the fin width in strained FinFETs with respect to standard ones. The output conductance degrades if narrow fins are used and improves for wide fins. Narrow strained FinFETs show a degradation of the Early voltage compared to standard ones suggesting that strained devices are more subjected to the channel length modulation effect.