GaN growth on patterned silicon substrates. A thermo mechanical study on wafer bow reduction

Abstract

Residual stresses and strains are unavoidable after growing GaN epitaxial films on silicon wafers because of lattice and thermal expansion coefficient mismatch between them. Due to the high processing temperatures (>1000°C) and the difference in the coefficient of thermal expansion between the silicon substrate and the GaN layer, high tensile stresses are induced in the epitaxial layer when cooling from the growth temperature to room temperature. Besides possible dislocations and cracks in the GaN, these stresses have an effect also on the warpage of the wafer, making difficult or impossible the processing of subsequent steps. In this paper, we propose a solution to reduce, or even, eliminate the global wafer warpage over a wide range of temperatures. Deep patterned trenches are etched into the silicon substrate, eliminating the continuity of the GaN layer and isolating the stresses/strain into small islands. The effect of the geometry of these trenches on the mechanical behavior of the wafer has been studied by Finite Element Modeling (FEM). It has been found that by etching a trench of 80 µm and forming islands of 250 µm, the remaining warpage of the wafer is practically zero for the whole range of temperatures.