GaAsSb/InGaAs double-gate vertical tunnel FET with a subthreshold slope of 56 mV dec−1 at room temperature

Abstract

We fabricated double-gate vertical GaAsSb/InGaAs tunnel FETs (TFETs). The characteristics of these TFETs were improved by changing the gate electrode evaporation from the electron beam to thermal evaporation. Furthermore, by changing the insulator from Al2O3/HfO2 to Al2O3/ZrO2, the steepest subthreshold slope (SS) = 56 mV dec−1 at VDS = 0.2 V was achieved. We analyzed these devices in two ways. First, to investigate the influence of trap-assisted tunneling (TAT), we conducted low-temperature measurements and found that TAT was suppressed through thermal evaporation. Next, to estimate the limitation of the SS, the energy decay parameter E0 was estimated from the negative differential resistance characteristics. Energy decay parameter E0 is determined by the impurity level and becomes a leak component of the TFET. However, we found that energy decay parameter E0 is both process and temperature-dependent.