FPGA Implementation Of Dynamic Power, Area Optimized Reversible ALU For Various DSP Applications

Abstract

Today electronic products that are using chip as a component are facing severe problems in power dissipation. So most efficient power reducing architectures has to be developed to reduce the costs for maintenance. This is a most important task for embedded based devices, graphical based processor and similar DSP processor which suffers with low power. The core of each and every embedded device and processor uses ALU as the dependable module. It points out that ALU should consume less power and area and must provide high speed of operation with high accuracy. This paper describes design and implementation of ALU using reversible logic gates. Reversible logics are used to reduces power consumption. The aim of this paper is to compare the power consumption and area of conventional ALU and ALU which uses reversible logic gates. Both the architectures have been developed by using Verilog HDL in Xilinx ISE design suite 14.7.