FPGA Design of Encryption Speech system using Synchronized Fixed-Point Chaotic Maps Based Stream Ciphers

Abstract

In this work, speech encryption using synchronized fixed-point chaotic map-based stream ciphers (SFPCM-SC) is suggested. Five chaotic maps named quadratic, henon, logistic, lozi and duffing are synchronized by using master-slave synchronization technique and then used to generate the pseudo random bit generator (PRBG) using fixed-point converter. The PRBG is then Xor-ed with digitized speech signal where the encrypted signal is created. In the other side, the same map is synchronized with the master one and used to recover the original speech signal. First this work is simulated by using MATLAB and then built the design using Xilinx system generator (XSG). Finally, the hardware co-simulation is applied for the proposed system by using FPGA SP605 XC6SLX45T device. The results show that the error between master and slave become zero after a small period and the original speech signal is recovered with real time environment in successful.