Abstract
This study explored a simplified micro-scale Cu damascene process based on UV-assisted thermal imprinting of SU-8 to investigate its process merits and potential defects that may occur during and after processing. For comparative study, arbitrary electrical circuits composed of Cu wiring structures with widths ranging from 10 μm to 1 mm were developed in SU-8/Si patterned by UV-assisted thermal imprinting and in oxidized Si samples prepared by reactive ion etching (RIE) followed by thermal oxidation. The imprint-based approach could lower process cycles, equipment cost, and etching gas use, whereas it induced a higher residual stress and more delamination defects. The process studied here are expected to be applied to fabricate micro-scale Cu structures, such as coils, antennas, electrical circuits, and wiring and connecting lines if further enhancements of the adhesion ability between layers and the design of pattern fields in a mold are accomplished.
Published Version
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