Floating Bulk Cascode Class-E Power Amplifier

Abstract

In this brief, the switching behavior of the cascode topology is improved through the floating bulk (FB) technique. Although the cascode structure has the advantage of reducing voltage stress on transistors, its parasitic elements increase power loss. The FB technique has been proposed to alleviate the power loss in the cascode class-E PA topology which results in enhancement of power added efficiency (PAE). In this method, the bulk of the common-gate (CG) transistor is connected to the ground through a resistor. As a result, the parasitic capacitances between the drain and source of the CG transistor create a new path of current that accelerates charging of parasitic capacitance at the drain of the common-source (CS) transistor. This new current path speeds up on-to-off transition of the CG transistor. In addition, the threshold voltage of the CG device is increased during on and off transitions which lowers the drain-source voltage of the CS device. Concurrently, these two phenomena minimize the power loss in both CS and CG transistors. To demonstrate the functionality of the FB technique, a cascode class-E PA is implemented in a 0.18- $\boldsymbol {\mu }\text{m}$ CMOS TSMC process at 1.8 GHz with 52% PAE and 27 dBm maximum output power.