Fine Pitch Micro Indium Bump Interconnect Flip Chip Bonding

Abstract

Quantum computing processors, micro LED displays and Focal Plane Array (FPA) imaging and detector devices such as infrared (IR) thermal imaging sensors are seeing higher demand as more practical applications requiring these components are coming into research and development, industrial, military and consumer markets. This paired with higher pixel and Qubit count and interconnect density, on larger and larger chips is driving hybridization and monolithic integration in these technologies. This is showing a marked increase in demand for fine pitch micro bump interconnection flip chip die bonding. However, some critical challenges facing these technologies are; larger component sizes mean higher density interconnections over increasing surface area. Submicron accuracy required to align fine pitch micro interconnect arrays. This together with the challenges facing the materials that are becoming the industry standard for these applications, such as the requirement for the assembled components to remain stable in extreme conditions such as cryogenic application environments. Combined with low loss high strength mechanical/ electrical interconnect requirements on components containing sensitive materials, structures and unmatched coefficient of thermal expansion (CTE) means that processing gases such as formic acid or high temperature reflow bonding can no longer be used to bond these devices. These challenges mean that the industry is fast approaching the limitations of even state-of-the-art die bonders and die bonding methods on the market today. This paper is going to highlight these challenges and the methods used to address them to produce large format, high density IR thermal imaging FPA devices, Quantum processors and micro LED displays using fine pitch micro Indium bump array interconnections that meet today’s industry requirements.