Abstract
An area-efficient non-volatile flip flop (NVFF) is proposed. Two minimum-sized Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) and two magnetic tunnel junction (MTJ) devices are added on top of a conventional D flip-flop for temporary storage during the power-down. An area overhead of the temporary storage is minimized by reusing a part of the D flip-flop and an energy overhead is reduced by a current-reuse technique. In addition, two optimization strategies of the use of the proposed NVFF are proposed: (1) A module-based placement in a design phase for minimizing the area overhead; and (2) a dynamic write pulse modulation at runtime for reducing the energy overhead. We evaluated the proposed NVFF circuit using a compact MTJ model targeting an implementation in a 10 nm technology node. Results indicate that area overhead is normalized to the conventional flip flop. Compared to the best previously known NVFFs, the proposed circuit succeeded in reducing the area by and the energy by . The proposed placement strategy of the NVFF shows an improvement of nearly a factor of 2–18 in terms of area and energy, and the pulse duration modulation provides a further energy reduction depending on fault tolerance of programs.
Highlights
Power gating has been researched as an effective energy-reduction technique [1,2,3]
The MT JA is written to the AP state because the current direction is from the pinned layer (PL) to the free layer (FL) of the magnetic tunnel junction (MTJ), and MT JB becomes the P state because the current direction is reversed (FL→PL)
The relative area overhead is 6.9%, and the proposed non-volatile flip flop (NVFF) shows an improvement of nearly a factor of 4–23 in terms of area overhead compared to state-of-the-art NVFF designs
Summary
Power gating has been researched as an effective energy-reduction technique [1,2,3]. This reduces static power consumption by shutting power off. One critical issue is an overhead to store/restore data onto non-volatile temporary storage of the NVFF before/after the power-down. It is universally the case when adding a new feature (e.g., non-volatility) to the existing flip-flop. The MTJ write process itself is fundamentally stochastic and the actual time to the completion varies dramatically with the distribution having a very long tail [9,10,11] This means that write energy varies quite significantly and the write energy can be wasteful if the applied write pulse duration is not carefully selected. Analysis indicates the placement shows an improvement of nearly a factor of 2–18 in terms of area and energy and the pulse duration modulation maximizes energy savings of the proposed NVFF for programs have high fault tolerance.
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