Feasibility of very‐short‐channel mos transistors with double‐gate structure

Abstract

AbstractConventionally, extremely thin gate oxide and high channel‐doping concentration are used to reduce the short channel effect of an MOS transistor below the submicron region. However, with these methods, there are problems such as the degradation in design freedom with respect to the breakdown voltage, the considerable decrease in the carrier mobility and the remarkable variation in characteristics of devices due to the statistical fluctuation of the impurity doping profile; and they need to be solved. Through the numerical analysis of the threshold voltage performance and the experimental fabrication of various devices with effective channel length range from 0.26 μm to 1.26 μm, it has been made clear in this paper that a double‐gate MOS transistor (XMOS) structure with another insulated gate at the lower part of the channel can reduce the short channel effect without the above‐mentioned problems. The results also show that the gate swing has reached about 60 mV/decade that is close to the theoretical limit; the short channel effect can even be reduced with a much shorter channel length if a thinner active channel layer is used and that reduction is independent of the channel doping concentration; and the limit to a possible shorter channel length may be less than 0.1 μm. It is concluded that the problems with the conventional MOS transistor can be solved by using XMOS structure.