Abstract
Far-end crosstalk (FEXT) is a critical factor that limits signal integrity performance in high-speed systems. The FEXT level is sensitive to the dielectric inhomogeneity of the stripline in fabricated printed circuit boards (PCB). The dielectric of the stripline is manufactured with multiple inhomogeneous dielectric layers (IDLs) of various resin and glass fiber bundles. A marginal difference in the dielectric permittivity of the IDLs can lead to a significant change FEXT level. In this paper, a practical FEXT modeling methodology for striplines is proposed by introducing the extraction method for the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${{\bm{\varepsilon }}}_{\bm{r}}$</tex-math></inline-formula> of IDLs. The new stripline model is constructed with three IDLs comprised of core, prepreg, and resin pocket, to improve the model accuracy. With the cross-sectional geometry and measured S-parameters of the coupled striplines, the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${\bm{\ }}{{\bm{\varepsilon }}}_{\bm{r}}$</tex-math></inline-formula> of IDLs can be extracted. In addition, an analytical model to predict the FEXT polarity and magnitude of the stripline caused by the inhomogeneity is proposed targeted for pre-layout application. The proposed models have been verified using measurement. The proposed models can provide useful analysis methodology and design guidelines to mitigate the FEXT level in high-speed systems, especially for high-volume PCB tests in the pre-layout and post-layout stages.
Accepted Version
Published Version
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