Abstract
In order to carry out effective failure analysis on semiconductor devices, it is essential to have a disciplined analytical schedule to ensure that no relevant information is lost by virtue of any haphazard approach. This paper describes the rationale, approach and procedure for failure analysis (including de-packaging, selective layer removal and location of defects), some procedural problems and the consequent necessity for techniques complementary to microscopy. The results of a number of failure analyses are presented from numerous investigations on devices ranging from high power thyristors to microwave devices, discrete transistors and ICs, originating from field failures, OA goods inwards inspection and in-house fabricated devices. The problems involved in identifying particular mechanisms and causes of failure, and their assignment as being design, materials, processing or applications induced are discussed. Suggestions are made concerning the need for additional techniques for failure analyses on future generation devices.
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