Fabrication of high electron mobility transistors with T-gates by nanoimprint lithography

Abstract

T-gates are commonly used in high frequency low noise transistors on III–V materials since they provide a combination of short gate length and low gate resistance. Nanoimprint lithography can produce minimum pattern feature sizes equivalent to those attainable by high resolution electron beam lithography and it has potential advantages in terms of speed and cost. The imprint lithography step must be reliable and compatible with existing device process flows. In this article we describe a bilayer resist imprinting procedure for the fabrication of 120 nm T-gates for high electron mobility transistors. The results of transistor dc characterization are also presented and are similar to those obtained for transistors fabricated on the same material with gates realized by electron beam lithography.