Fabrication and characterization of fine pitch on-chip copper interconnects for advanced wafer level packaging by a high aspect ratio through AZ9260 resist electroplating

Abstract

In this paper, we report the fabrication of high aspect ratio, highly dense, very fine pitch on-chip copper-pillar-based interconnects for advanced packaging applications. Photoresist molds up to a thickness of 80 µm and having feature sizes as small as 5 µm were fabricated using multi-step coating of the positive tone AZ9260 photoresist. Spin coating and lithography parameters were optimized to achieve smooth and vertical sidewalls. Copper interconnects having an aspect ratio up to 6 and a pitch size of 25 µm were electroplated in the fabricated resist mold. Due to a very small pitch size, the total number of interconnects per cm2 chip area is 160 000, which is much larger than the conventional solder-based interconnects. The electrical resistance of the electroplated copper interconnects was measured by 4-probe kelvin measurement configuration and was found to be in the range of 8–10 mΩ and the corresponding electrical resistivity was calculated as 2.4 µΩ cm. Such low resistive interconnects can carry much larger electrical current without significant electrical loss, which is ideally suitable for next generation packaging applications. X-ray diffraction has shown the presence of the (2 2 0) texture along the length of electroplated copper pillars. Transmission electron microscope reveals the presence of nanoscale copper twins along the length of copper interconnects.