Extraction of Interface Trap Density in the Region Between Adjacent Wordlines in NAND Flash Memory Strings

Abstract

A new method to extract the interface trap density (N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</sub> ) on the surface of the Si region between adjacent wordlines (WLs-called space region) in NAND flash devices is presented in this letter. The N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</sub> is successfully extracted by applying charge pumping (CP) method, TCAD simulation, and modified equations. The CP current I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CP</sub> of single WL and electrically tied two WLs are measured using fixed-base CP measurement as a function of pass bias. In addition, an effective space area for CP is extracted by TCAD simulation, and the equation, which is used to extract N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</sub> , is modified to extract separated N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</sub> s in the channel and the space regions. We confirm that our method is accurate by comparing the measured I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CP</sub> with the calculated one.