Extensive study of Bias Temperature Instability in nanowire transistors

Abstract

In this paper, we investigate Bias Temperature Instabilities (BTI) in Ωfet nanowires exhibiting a very low interface states density ∼1010cm2. Positive BTI is independent of the transistor width W and meets the 10year lifetime requirements. On the other hand, Negative BTI is enhanced in narrow devices. To explain this effect, several scenarios are discussed by means of dedicated measurements i.e. charge pumping, BTI variability and 3D simulations. We first show that the oxide field in this 3D architecture cannot be responsible for this NBTI enhancement. Moreover we demonstrate by correlating NBTI variability and charge pumping measurements, that, the width dependence of NBTI may be explained by a stronger degradation of the interfacial oxide on the sidewall of the nanowire compared to the top interface.