Exploring channel length effects in 2D MoS2-Based memtransistors and their Synaptic behavior

Abstract

Memtransistors, combining the functionalities of memristors and transistors, signify a substantial advancement with potential applications in areas such as neuromorphic learning and the integration of processing and memory units in current computers. Particularly, memtransistors fabricated using 2D materials have received extensive research attention due to their memory capabilities, energy efficiency, and features enabling compact integration. In this study, we examined the utilization of MoS2 monolayers grown by chemical vapor deposition (CVD), inherently imbued with defects, as memtransistors. Our focus probed into the exploration of how the change in channel length within this imperfect architectural construct exerts influences on the hysteresis loop and hence the operation of the device. In this respect, increasing the gate voltage enhanced the distinction between high and low resistance states and lengthening the channel led to a decrease in the differentiation between resistance states. Despite the shrinkage in hysteresis loop width, the memristive characteristics were preserved even at low gate voltages. Shortening the channel length widened the gap between low and high resistance states but disrupted the loop symmetry. Interestingly, relatively long channel memtransistors exhibited a more symmetrical and closer-to-ideal hysteresis. Experiments in different environments highlighted the impact of photocurrent. We applied consecutive pulses, resulting in an increase in the baseline of the current graph. Short-lived changes in the memtransistors resistance suggested its potential to simulate the short-term potentiation property of synapses. Our study on CVD grown 2D material-based memtransistors provides insights into the potential of using such defected materials in memtransistors wide usage and demonstrating their ability to emulate synaptic behavior.