Abstract
3D integration consists of 3D IC packaging, 3D IC integration, and 3D Si integration. They are different and in general the TSV (through-silicon via) separates 3D IC packaging from 3D IC integration and 3D Si integration since the latter two use TSV but 3D IC packaging does not. TSV (with a new concept that every chip or interposer could have two surfaces with circuits) is the heart of 3D Si integration and 3D IC integration and is the focus of this investigation. The origin of 3D Si integration and 3D IC integration is presented. Furthermore, the evolution and outlook of 3D Si integration and 3D IC integration are discussed as well as their road maps are presented. Finally, a generic, low-cost and thermal-enhanced 3D IC integration system-in-package (SiP) is proposed for high performance applications.
Published Version
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