Abstract

Breakdown voltages of transistors with a buried layer are numerically calculated subject to the minimum collector resistance. In determination of breakdown voltages, both the thermally generated carriers within the collector-base depletion region and the carriers entering the junction from the emitter are considered. From the numerical results, empirical expressions for optimized collector doping density Nc and collector width Wc have been established. These relations have been found to be of considerable practical value in designing epitaxial bipolar transistors with lightly doped collectors.

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