Abstract
With increasing complexity and heterogeneity, miniaturized integrated system on both multi-chip module and printed circuit board levels relies more and more on high-speed point-to-point serial signal transmission links as the backbone of inter-chip data signal exchange network, which are inevitably accompanied by signal integrity problems such as loss, reflection, and crosstalk. The difficulties in the physical design phase of interconnect routing for high-speed link on densely occupied package interposers or printed circuit boards and the associated planar area overhead (keep-out zone for the crosstalk prevention and impedance matching, etc.), as well as the relevant cost in manufacturing, performance analysis and actual measurement or evaluation, are also sharply increasing; furthermore, the interconnects implemented on interposer or printed circuit board substrate are physically inflexible, and the corresponding microsystems are not suitable for emerging applications that generally demand good deformability and good conformality to 3-dimensionally shaped mounting surface. How to simultaneously elevate the cost-effectiveness, signal transmission performance and physical flexibility of the high-speed link, while keeping low profile of the whole module, has become one of the major challenges in the evolution of micro/nano system technology. Accordingly, this paper proposes a cable-based point-to-point link method, which adopts physically flexible and widely available off-the-shell cables that can be assembled onto the surface of the interposers or boards as a potential cost-effective solution to the challenge mentioned above. Universal Serial Bus, micro-coaxial cables, and Twinax cables are explored as candidates. The full links for each cable, from one of the paired connectors to another, are physically modeled and validated by an electromagnetic full-wave structural simulation tool, with key components of each type of link taken into considerations. The simulated results and the measured results from vector network analyzers are compared, which verifies the effectiveness of our proposal.
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