Etching mechanism of high-aspect-ratio array structure

Abstract

Through-Silicon-Via (TSV) is an significant technology that is being widely employed in micro-electro-mechanical system (MEMS) manufactories. However, it is remain challenging to obtain a deep silicon etching with vertical-angle and smooth-sidewall characterizes by silicon-etching anisotropy through TSV technology. Herein, we use inductively coupled plasma (ICP) to obtain the deep silicon etching anisotropy. Chamber pressure, Bosch process cycles, bias powers, and the size of the etching pattern, which are the critical controllable process parameters, have been investigated to achieve the silicon-etching anisotropy. The results reveal that the sidewall angle of the array structure becomes increasingly slanted while raising chamber pressure from 2 to 15 Pa in the SF6 etching process of the first step of the cycle in the Bosch process. As the cycles increase from 60 to 240 cycles at the bias power of 100 w, the anisotropy decreases from 0.80 to 0.5. With RF bias powers rise from 200 to 400 w, the anisotropy enhances from 0.80 to 0.94. Due to the collision of active ions with each other, the sidewall angle and anisotropy of a high aspect-ratio array structure severely depend on the incidence angle of the active ions. The “Si etching balance model” has been established for the fabrication of TSV.