Abstract
The through-silicon-via (TSV) technology is one of the most effective approaches to fulfill the form factor, profile, performance, and 3D interconnect demand of next generation handheld and wearable electronics. The TSV technology has been developed into two categories, the TSV Last and the TSV Middle. In this article, we examined a variety of aspects of the two TSV technologies when applied to 3D wafer level (WL) microelectromechanical systems (MEMS). We investigated the thermo-mechanical behavior of both TSV structures in wafer level package (WLP), through finite-element-analysis (FEA). Stress distribution of the package structures was revealed. The simulation study was also performed on the board level to analyze the extent of warpage of the package. The theoretical results were validated with the corresponding reliability and electrical characteristics investigations.
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