Abstract
Background. In the multipliers which use Galois filed \[GF(p^{m})\] with large order the hardware complexity allows implementation on FPGA chip, but high structural complexity prevents to do it. That’s why it is important to conduct research in Galois field \[GF(p^{m})\] to determine the field in which the structural complexity is the lowest.Objective. Develop the method for evaluating structural complexity of Mastrovito multiplier in response to the internal elements.Methods. Structural complexity of Mastrovito multiplier in Galois fields was determined by combining VHDL and SH models in a VHDL-SH model. In order to find the field with the least structural complexity, the extended Galois field \[GF(p^{m})\] with the same number of elements was analysed.Results. The relationship between structural complexity of Mastrovito multiplier in Galois fields \[GF(p^{m})\] and number of field bit in the capacity of the field was identified. The results for structural complexity of Mastrovito multiplier in Galois field \[GF(p^{m})\] using internal elements were modified.Conclusions.Method for calculating the structural complexity of Mastrovito multiplier in \[GF(p^{m})\] was developed. The structural complexity was calculated by combining VHDL and SH models in a VHDL-SH model. It was determined that structural complexity of the multiplier depends on capacity of the field \[GF(p^{m}),\] wherein the calculations are carried out. The structural complexity of Mastrovito multiplier in \[GF(p^{m})\] with approximately the same number of elements was calculated, where\[p^{m}\approx 625,\]\[p^{m}\approx 78502725751,\]\[p^{m}\approx 1,93485E+15.\]In calculating the structural complexity without internal elements the structural complexity of the multiplier is less, when the difference between the capacity of the field and number of field bit in the field order is growing. In calculating the structural complexity with internal elements, structural complexity of multiplier is less when the difference between number of field bit and field capacity is equal. This method application can help to develop Galois field \[GF(p^{m})\] multipliers with big order.
Highlights
In the multipliers which use Galois filed GF (p m) with large order the hardware complexity allows implementation on FPGA chip, but high structural complexity prevents to do it
The structural complexity was calculated by combining VHDL and SH models in a VHDL-SH model
It was determined that structural complexity of the multiplier depends on capacity of the field GF ( p m), wherein the calculations are carried out
Summary
In the multipliers which use Galois filed GF (p m) with large order the hardware complexity allows implementation on FPGA chip, but high structural complexity prevents to do it. That’s why it is important to conduct research in Galois field GF (p m) to determine the field in which the structural complexity is the lowest. Develop the method for evaluating structural complexity of Mastorovito multiplier in response to the internal elements. Structural complexity of Mastorvito multiplier in Galois fields was determined by combining VHDL and SH models in a VHDL-SH model. In order to find the field with the least structural complexity, the extended Galois field GF (p m) with the same number of elements was analysed
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