Abstract

A method for determining the temperature rise of a power MOSFET during an unclamped inductive switching (UIS) test is described. The procedure consists of the following steps: breakdown voltage avalanche resistance measurement, breakdown voltage temperature coefficient calibration, and voltage waveform monitoring during the UIS test. A first-order model of the voltage waveform allows the computation of the junction temperature rise due to self-heating during a high-energy, long-pulse UIS test. The estimations are compared with those obtained based on the thermal impedance concept. >

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