Abstract

We investigate the robustness of E-mode GaN HEMTs under ESD testing; specifically, we focus on three aspects, i.e. the impact of gate bias on TLP failure voltage, the role of device geometry (with focus on gate length), and the difference in failure voltage when tests are carried out under UV illumination. The results demonstrate that: (i) when the transistors are tested in semi-on and on-state (4 V < VGS < 6 V), failure occurs due to a current-dependent process and failure takes place at a random position along the gate finger, as demonstrated by optical inspection; (ii) gate geometry strongly impacts on TLP stability; specifically, devices with larger gate length have a better robustness, possibly due to the lower drain current (higher on-resistance) and the lower power dissipation. (iii) We find that under UV light the TLP robustness is slightly improved. This is ascribed to a “beneficial” effect of traps; however, the effect is much less than in previous reports, possibly due to a much better epitaxial quality.

Highlights

  • Enhancement-mode GaN-based high electron mobility transistors (HEMTs) are very promising in a wide range of power electronics applications

  • We investigate the behaviour of such devices in dynamic operation in order to assess the robustness of E-mode GaN HEMT at such very fast transient power

  • In order to investigate the influence of device geometry on breakdown and electrostatic discharges (ESD) performance, the p-GaN gate AlGaN/GaN devices have gate lengths LG ranging from 1 μm to 3 μm

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Summary

Introduction

Enhancement-mode GaN-based high electron mobility transistors (HEMTs) are very promising in a wide range of power electronics applications. The p-doped gate layer on top of the AlGaN barrier and the GaN channel is electrically equivalent to a back-to-back diode model; when a positive bias is applied to the gate, the p-GaN/AlGaN/GaN diode gradually starts turning on, contributing to the forward gate current that has been often reported to be a concern for reliability, whereas the metal/p-GaN diode is reversely biased. This is true if the M/S contact is of Schottky type, a solution which is often adopted in order to minimize the gate leakage current. We investigate the behaviour of such devices in dynamic operation in order to assess the robustness of E-mode GaN HEMT at such very fast transient power

Device description
The system
Measurement description
The SOA results
Correlation between SOA and Gate length
Conclusions
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