Error Correction For Soft Errors

Dhanushya T,Latha T

doi:10.4172/2332-0796.1000276

Abstract

Radiation induced soft errors are susceptible to most of the electronic products with the development of CMOS technology. A particle striking on any of the electronic products can produce soft errors that can be either single event upset or single event transient. There are various techniques such as FERST, BISER, TMR, DMR, DICE, SEC-DED, DEC-TED, EDAC, PARSHIELD, and STEM for soft error elimination. But these techniques do not provide self-checking capability, and has high area, output corruption. Soft Error and Timing error Tolerant Flip Flop (SETTOFF) is used to conquer these drawbacks. The self-checking is provided at the transition detection part. SETTOFF is designed for normal operation and fault operation. This has higher area overhead than BISER. So BISER by means of self-checking capability has been proposed to conquer the limitations by reducing the area. BISER by means of self-checking can yield better results with reduced area overhead, power and delay compared to SETTOFF architecture and BISER. The architecture is implemented using SPICE and simulation waveforms are obtained.

Highlights

All the electronic component devices and planetary mission spacecraft’s correspond toward a particular radiation rise within the space radiation atmosphere
BISER with self-checking circuit has been implemented for soft error correction during normal operating mode and fault operating mode
This paper implements the design of BISER with self-checking for soft error correction

Summary

Introduction

All the electronic component devices and planetary mission spacecraft’s correspond toward a particular radiation rise within the space radiation atmosphere. A solution to this problem is to design the SETTOFF architecture [10] which can correct SEUs and detect the captured SETs, and the timing error in the logic state. The self-checking mechanism for correcting the soft errors is applicable only in SETTOFF. The SET, SEUs that occur in latches, flip-flops are corrected and detected by BISER technique with less area overhead requirement, but this do not provide self-checking capability.

Results

Conclusion