Abstract
In the first part of this paper, we have quantified the surface roughness, the degree of strain relaxation and the defect density in thick Ge layers grown using a low temperature / high temperature approach on nominal and 6oC off (towards one of the <110> directions) Si(001) substrates. In the second part, we have succinctly described the Si passivation process we use on Ge prior to gate stack formation in order to obtain high performance p-type metal oxide semiconductor field effect transistors.
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