Abstract

Fault simulation algorithms used for large designs propagate a list of faults instead of a single fault in each simulation. Concurrent (Ulrich and Baker, 1974) and deductive (Armstrong, 1972) fault simulation algorithms are two examples of this kind of algorithm. In this paper, we utilize an optimization concept, which can be added to fault list propagating algorithms. In this concept, faults can be grouped into several disjoint fault sets. All faults in a group affect every line of the circuit in a similar way. Fault clustering is performed dynamically, based on a particular test vector, during the fault simulation process. This method causes less memory fragmentation, since there are a limited number of fault groups in each simulation time. On the other hand, it reduces faulty circuit calculation in fault simulation process compared with the traditional fault simulation methods. In addition, the generality of this concept makes it useful for behavioral fault simulation methods as well as traditional gate-level ones. We have implemented this method in the VHDL environment and tested it on ISCAS'85 benchmarks. Experimental results show that in large circuits the performance is at least doubled by this technique

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