Abstract
Split Gate SiC MOSFETs (SG-MOSFETs) have been demonstrated to exhibit excellent power dissipation at high operating frequencies due to their low specific reverse transfer capacitance (Crss,sp); however, there are several reliability issues of SG-MOSFETs, including electric field crowding at the gate oxide and insufficient short-circuit (SC) robustness. In this paper, we propose a device structure to enhance the short-circuit withstand time (SCWT) of 1.2 kV SG-MOSFETs. The proposed P-shielded SG-MOSFETs (PSG-MOSFETs) feature a P-shielding region that expands the depletion region within the JFET region under both blocking mode and SC conditions. Compared to the conventional structure, this reduces the maximum electric field in the gate oxide, enabling a higher doping concentration in the JFET region, which can reduce the specific on-resistance (Ron,sp) to minimize power dissipation during device operation. The SC robustness of PSG-MOSFETs, with an Ron,sp identical to those of SG-MOSFETs, was investigated by adjusting the width of the P-shielding region (WP). Furthermore, the Crss,sp of PSG-MOSFETs was compared with that of SG-MOSFETs to analyze the relationship between the WP and high-frequency figure of merit (HF-FOM), defined as Ron,sp × Crss,sp. These results demonstrated that the PSG-MOSFET achieved an enhanced SC robustness and HF-FOM in comparison to the SG-MOSFET. Thus, the proposed PSG-MOSFET is a highly suitable candidate for high-frequency and reliable applications.
Published Version
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