Optimization of the JFET region of 1.2kV SiC MOSFETs for improved high frequency figure of merit (HF-FOM)

Abstract

This paper presents the optimization of JFET region parameters of 1.2kV SiC MOSFET. MOSFETs with various designs in the JFET region were fabricated on 6-inch substrates. Investigations on on-resistance, gate-to-drain capacitance, and leakage currents in the forward blocking mode (room temperature and 175 °C) conclude that the enhanced doping in the JFET region allows an improved high frequency figure of merit (HF-FOM).