Abstract

In this paper, an improved low voltage triggered silicon-controlled rectifier (LVTSCR) for electrostatic discharge protection is proposed. By carefully optimizing the electric field distribution at the junction of P-WELL and NWELL in LVTSCR, the holding voltage of the enhanced LVTSCR (ELVTSCR) can be effectively increased to improve latch-up immunity. TCAD simulation indicates that compared with traditional LVTSCR, the proposed ELVTSCR has higher and adjustable holding voltage as well as comparable trigger voltage, making it suitable to provide ESD solutions for high voltage (HV) applications in advanced CMOS technology.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.