Design of ESD protection with SCR-based structures for latch-up immunity

Abstract

In this paper, we proposed a novel SCR (Silicon Controlled Rectifier)-based ESD (Electrostatic Discharge) protection circuit for I/O and power clamp. HHVSCR (High Holding Voltage SCR) has a high holding voltage and low trigger voltage characteristics than conventional SCR. And advanced HHVSCR is proposed for high voltage application. These characteristics enable to have latch-up immunity under normal operating conditions as well as superior full chip ESD protection. Proposed ESD protection circuits are verified and compared by TCAD simulation. As a result of simulation, holding voltage increases with different design parameters. The holding voltage of HHVSCR changes from 3V to 4.83V. On the other hands, the holding voltage of Advanced HHVSCR changes from 4.61V to 8.75V. The trigger voltage of HHVSCR has about 8~9V whereas Advanced HHVSCR varies from 27.3V to 32.7V due to different breakdown occurrence.