Energy Efficient Single-Ended 6-T SRAM for Multimedia Applications

Abstract

Image processing and other multimedia applications require large embedded storage. In some of the earlier works approximate memory has been shown as a potential energy-efficient solution for such error-tolerant applications. In this brief, we propose a single ended 6-T (SE6T) static random access memory (SRAM) cell which has about 50% less dynamic power compared to conventional 6-T SRAM cell with the same bit error rate (BER). Since image processing applications are tolerant to errors, ultra low voltage power-efficient embedded memories with BER can be used for storage. We show that 1 KB ( $256 \times 32$ ) SE6T memory consumes $ {0.45\times }$ dynamic power, $ {0.83\times }$ leakage power and takes $ {0.60\times }$ area as compared to conventional 6T SRAM memory for similar peak signal to noise ratio (PSNR). We have also proposed heterogeneous SE6T 1K SRAM memory and show that for a given power budget, PSNR enhances by at least by 14 dB compared to when homogeneous (identically sized bit-cells) SE6T SRAM memory are used. When compared with heterogeneous 6T SRAM memory, the heterogeneous SE6T SRAM memory consumes $ {0.44\times }$ dynamic power, $ {0.86\times }$ leakage power and takes $ {0.6\times }$ area for almost similar PSNR. For a given PSNR, the SE6T memory is cumulatively better in terms of design complexity, area and power when compared with other hybrid and heterogeneous approximate memories.