ENCODING OF COLLECTIONS OF MICROOPERATIONS FOR THREE-LEVEL COMBINED AUTOMATON

Abstract

Presently the models of firmware automats (МPА) are widely used for the task of behavior of control (CU) unit. One of these models is a combined MPA (SMPA). Its characteristic feature is the presence of two types of output signals. The output signals of the Mile automaton exist at transitions between states of the automaton. The output of the Moore machine is determined only by the state of the machine and lasts almost a whole cycle. Due to the versatility of this model, it has become the basis for the research presented in this article. The most popular basis used to implement digital systems is FPGA (field-programmable logic arrays). The main elements of the FPGA used to implement MPAs are LUT (look-up table) elements, programmable triggers, and programmable interconnects. The paper proposes a method of reducing hardware costs in the scheme of a combined machine, implemented in a common base of LUT elements and blocks of memory EMB. The method is based on replacement of logical conditions and partition of the set of states by classes. Each class corresponds to a single block of the circuit. This approach leads to circuits with regular structure and three levels of logic. The proposed model leads to schemes with regular connections. This simplifies the placement and tracing tasks when implementing the SMPA scheme. A positive feature of the proposed model is the fact that the Clock and Start signals are associated with only one block of the circuit. This avoids the problems associated with the so-called distortion synchronization. Analysis of the special library showed that the proposed method is appropriate to use for 78% of test cases. Studies were performed for chips of the Virtex-6 family (S = 6). In this case, the developed SMPA models differed at high speed than their counterparts having the previous structure. For the remaining 22% of the test cases, the payoff was much smaller, as the specialized LUT units were implemented in the form of multilevel schemes. A further direction of research is related to: 1) the replacement of some LUTs by EMBs and 2) the use of logical conditions encoding methods to reduce the parameter K.