Emulation circuits of fractional-order memelements with multiple pinched points and their applications

Abstract

Abstract This paper proposes voltage- and current-controlled universal memelements emulators. They are employed to realize the floating and grounded fractional-order memelements. The proposed emulators are implemented using different active blocks such as the second-generation current conveyor (CCII), Differential input double output transconductance amplifier (DOTA + ), balanced output CCII, and Differential voltage current conveyor (DVCC) with analog voltage multiplier. One of the main characteristics of the memristive elements is hysteresis loop behaviour with one pinched point, and the higher-order memelements have multiple pinched points. The higher fractional-order memductance (FOM) and inverse memductance (FOIM) emulators are proposed, which achieve multiple pinched-off points. The coordinates of the multiple pinched-off points and the conditions to achieve them are discussed in the I-V plane. Additionally, the effect of different orders α of the fractional-order capacitor (FOC) on the memelements characteristic is discussed. The circuit simulations for the proposed emulators have been verified using PSPICE simulations and validated experimentally at different orders. Finally, the grounded proposed emulator is employed in Chua's chaotic oscillator as an application presenting the effect of fractional-order on the chaotic response. Also, the floating proposed emulator is applied to a relaxation oscillator, to show the reliability of the proposed emulator.