Abstract

This article provides an overview of the embedded multidie interconnect bridge (EMIB) multichip packaging (MCP) technology. EMIB is a unique packaging paradigm that provides very high-density interconnects (currently in the range of 500–1000 I/O/mm) localized in between two devices, thus enabling high-bandwidth (BW) on-package links while leaving the rest of the package structures and designs unaffected. The construction of the silicon bridge and the package to allow high BW electrical signaling between two dies is discussed in detail. Examples of the EMIB implementations for the links between the field-programmable gate array (FPGA) logic and high bandwidth memory generation 2 (HBM2) memory stacks, graphics die and HBM2 memory stacks, FPGA logic die, and high-performance transceiver die are described. EMIB packaging is compared with similar high-density interconnect technologies such as silicon interposer with through-silicon vias (TSVs) and other fan-out-based package technologies. Design optimization strategies for power delivery and I/O routing in the presence of an embedded bridge are highlighted.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call