Embedded Multi‐die Interconnect Bridge (EMIB)

Abstract

This chapter presents comparisons between planar architectures that use silicon back‐end wiring technologies that essentially represent the upper end of the I/O/mm/layer spectrum and offer silicon‐level connectivity on package. Embedded multi‐die interconnect bridge (EMIB) is a planar dense multi‐chip packages technology, where the basic concept is that it uses thin pieces of silicon with multilayer back‐end‐of‐line interconnects, embedded in organic substrates, to enable dense die‐to‐die interconnects. The chapter describes the EMIB technology architecture and the high level EMIB process flow followed by a discussion of the high bandwidth envelope. It focuses on the electrical signaling performance of EMIB. Typically EMIB is used to connect two adjacent dies. This results in a relatively short I/O channel that does not demand complex transceiver circuits to meet signal integrity requirements. The chapter also presents results from eye diagram simulations to demonstrate that the I/O channel and circuits can meet signal integrity requirements.