Abstract
This paper describes the electron beam direct writing technology for 64-Mb DRAM LSIs including a resist process for 0.3-µm resolution, the prevention of the charging problem by a conducting polymer, and proximity effect correction by both the pattern classification method and the subsidiary exposure method. A large amount of pattern data is processed after dividing the whole chip data into peripheral circuits and 256-kb memory mats. An experimental 64-Mb DRAM LSI is fabricated by these technologies.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
