Electrical Stability Analysis of Dynamic Logic Using Amorphous Indium–Gallium–Zinc-Oxide TFTs

Abstract

Prior research has reported that the device characteristics of amorphous indium–gallium–zinc-oxide (a-IGZO) thin-film transistors (TFTs) have been changed by instabilities due to electrical stress. Because positive bias stress and high current stress produce a positive threshold voltage shift, if the digital logic circuit is designed using a-IGZO TFTs, there is a high possibility that the circuit suffers from malfunction. In this letter, the dynamic and the static logic circuits using n-type a-IGZO TFTs are compared in terms of stability for electrical stress. In order to compare the stability of the two circuits, DC and AC signals are applied. The measurement results suggest that the dynamic logic circuit is much more stable than the static logic circuit regarding electrical stress.