Dynamic Logic Circuits Using a-IGZO TFTs

Abstract

Previously reported thin-film transistor (TFT) digital logic gates are mostly static circuits. If the static logic circuits are implemented using either nMOS or pMOS technologies alone, unlike CMOS technologies, the circuits consume high power because of the steady-state current, and take large circuit area. In this paper, the dynamic logic circuits using n-type a-IGZO TFTs are proposed to resolve the power and circuit area issues. The dynamic logic circuits such as inverters and nand gates are fabricated in an amorphous indium–gallium–zinc–oxide TFT technology, and traditional static logic circuits are also implemented with the same technology for comparison purposes. The measurement results show that the proposed dynamic logic circuit consumes no steady-state current, and the circuit area is reduced by 93.1%.